Scielo RSS <![CDATA[South African Computer Journal]]> http://www.scielo.org.za/rss.php?pid=2313-783520190001&lang=en vol. 31 num. 1 lang. en <![CDATA[SciELO Logo]]> http://www.scielo.org.za/img/en/fbpelogp.gif http://www.scielo.org.za <![CDATA[<b>Editorial: Limits on Special Issues</b>]]> http://www.scielo.org.za/scielo.php?script=sci_arttext&pid=S2313-78352019000100001&lng=en&nrm=iso&tlng=en <![CDATA[<b>A Smart Home environment to support risk monitoring for the elderly living independently</b>]]> http://www.scielo.org.za/scielo.php?script=sci_arttext&pid=S2313-78352019000100002&lng=en&nrm=iso&tlng=en Elderly people prefer to live independently despite being vulnerable to age-related challenges. Constant monitoring is required in cases where the elderly are living alone. The home environment can be a dangerous environment for the elderly due to adverse events that can occur at any time. The potential risks for the elderly living independently can be categorised as injury in the home, home environmental risks, and inactivity due to unconsciousness. The aim of this paper is to discuss the development of a low-cost Smart Home Environment (SHE) that can support risk and safety monitoring for the elderly living independently. An unobtrusive and low cost SHE prototype that uses a Raspberry Pi 3 model B, a Microsoft Kinect Sensor and an Aeotec 4-in-1 Multisensor was designed and implemented. An experimental evaluation was conducted to determine the accuracy with which the prototype SHE detected abnormal events. The results show that the prototype has a mean accuracy, sensitivity and specificity of 94%, 96.92% and 88.93% respectively. The sensitivity shows that the chance of the prototype missing a risk situation is 3.08%, and the specificity shows that the chance of incorrectly classifying a non-risk situation is 11.07%. CATEGORIES: · Human-centered computing ~ Ubiquitous and mobile computing design and evaluation methods <![CDATA[<b>Towards a framework for online information security applications development: A socio-technical approach</b>]]> http://www.scielo.org.za/scielo.php?script=sci_arttext&pid=S2313-78352019000100003&lng=en&nrm=iso&tlng=en The paper presents a validated socio-technical information security (STInfoSec) framework for the development of online information security (InfoSec) applications. The framework addresses both social and technical aspects of InfoSec design. The preliminary framework was developed using a mixed methods research design that collected data from 540 surveys by online banking users and six interviews with online banking personnel. The preliminary framework was presented in another publication and it is beyond the scope of this paper. The scope of this paper is limited to the validation findings of the evaluation process that involves seven evaluators. In the socio-technical context, the STInfoSec framework facilitates acceptance and usability of online applications based on online banking as a case study. The authors argue that usability of online InfoSec applications such as online banking significantly affects the adoption and continued use of such applications. As such, the paper investigates design principles for usable security and proposes a validated STInfoSec framework that consists of 12 usable security design principles. The design principles have been validated through heuristic evaluation by seven field experts for inclusion in the final STInfoSec framework. The development of InfoSec applications can be improved by applying these design principles. CATEGORIES: · Security and privacy ~ Usability in security and privacy <![CDATA[<b>Computing research in South Africa: A scientometric investigation</b>]]> http://www.scielo.org.za/scielo.php?script=sci_arttext&pid=S2313-78352019000100004&lng=en&nrm=iso&tlng=en Limited attention has been afforded to mapping the 'landscape' of South African computing research. Prior studies have considered singular sub-disciplines, publications, or publication types. Given the growing prominence of computing disciplines, it is necessary to identify the patterns of research production, publication, collaboration, and impact of South African computing research. This study presents a scientometric investigation in this regard. Through the analysis of data accessed from the Scopus citation enhanced bibliographic database, the investigation presents findings in relation to annual research production, institutional differences in outputs, topics, collaboration, and citation impact. While characterised by institutional differences, over the period considered, South African computing research output has increased at a greater rate than that of South African research at large. Additionally, despite accounting for a greater proportion of all outputs, conference papers account for a smaller proportion of citations relative to journal articles or book chapters. Corresponding to previous investigations, there exists a tendency towards applied computing topics in contrast to more theoretical topics. Finally, the collaboration network was shown to be particularly de-centralised with many researchers clustered around institutions. The findings are of interest to all researchers conducting computing or related research in South Africa. CATEGORIES: · Applied computing ~ Digital libraries and archives · General and reference ~ Surveys and overviews <![CDATA[<b>Parsing and analysis of a Xilinx FPGA bitstream for generating new hardware by direct bit manipulation in real-time</b>]]> http://www.scielo.org.za/scielo.php?script=sci_arttext&pid=S2313-78352019000100005&lng=en&nrm=iso&tlng=en Despite the many advantages run-time reconfiguration of FPGAs brings to the table, its usage is mostly limited to quasi-static applications. This is either due to the throughput of the reconfiguration process, or the time required to create new hardware. In order to optimise the former, the literature proposes a block RAM (BRAM)-based architecture in which a new configuration is stored in localised memory and reconfiguration is facilitated by a controller implemented in the FPGA fabric. The limitation of this architecture is that only a subset of configurations can be stored. When new hardware is required, the slow synthesis process (or a part thereof) has to be repeated for each new configuration. Various third-party tools aim to mitigate this overhead, but since the bitstream is shrouded in obscurity, all rely on a layer of abstraction that make them unusable in real-time. To address this issue, this paper presents a novel method to parse and analyse a Xilinx® FPGA bitstream to extract certain characteristics. It is shown how these characteristics could be used to design and implement a bitstream specialiser, capable of taking a bitstream and modifying the configuration bits of lookup tables in real-time. CATEGORIES: · Hardware ~ Reconfigurable logic and FPGAs · Computer systems organization ~ Other architectures